Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, may refer to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well. The term wafer and the term thin polished plate may be used interchangeably in the present disclosure.
Fabricating semiconductor devices typically includes processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing (CMP), etching, deposition, and ion implantation.
Generally, certain requirements are established for the flatness and thickness uniformity of the wafers. However, the various process steps required during fabrication and thickness variations result in elastic deformation that can cause significant distortions (e.g., in-plane distortions IPD and/or out-plane distortions OPD). Distortions may lead to errors in downstream applications such as overlay errors in lithographic patterning or the like. Therefore, providing the ability to predict/estimate process-induced distortions is a vital part of semiconductor manufacturing process.
Therein lies a need for systems and methods for accurate and efficient prediction and measurement of distortions.